Course Name	Integrated Circuit Design
Credits	3
Professor(s)	Name	Yeong-Yil, Yang
	Department	Information Technology Devices Engineering

COURSE DESCRIPTION

Course Objectives

It is designed to provide you with  opportunities to design the system including the problem definition of the digital system, CAD tool usage, behavioral level description and so on.

MAIN TEXTBOOK and FURTHER READINGS

Main Textbook: Yeongyil-Yang(2005):Integrated Circuit Design(Handout Sheets)

Further Reading:

Roger Lipsett:VHDL(1989) VHDL:Hardware Description and Design

Joo-Sung Park(2000):Digital System Design using FPGA

ASSIGNMENTS AND GRADING

ASSIGNMENTS

- Digital System Design with both schematic and behavioral levels
Grading Scheme
- Attendance(10%), Mid-term Exam(20%), Final Exam(30%), Tasks(40%)

COURSE SCHEDULE

Course Outline

Week 1: Introduction to Integrated Circuit Design
Week 2: Design Method of Combinational Logic
Week 3: CAD tool Usage
Week 4: Design Method of Sequential Logic
Week 5: Stopwatch Design: Counters (6, 10, 12)
Week 6: Stopwatch Design: Frequency Divider
Week 7: Stopwatch Design: Data Path Design
Week 8: Mid-term Exam
Week 9: Stopwatch Design: Controller Design
Week 10: Stopwatch Design: Input/Output Design
Week 11: Stopwatch Design: Test of Stopwatch
Week 12: Syntax of VHDL(VHSIC Hardware Description Language)
Week 13: Counter Design using VHDL
Week 14: Stopwatch Design using VHDL

Week 15: Final Exam

CONTACT DETAILS

Tel: 82-55-751-5361
e-mail: yyang@gnu.ac.kr